Status Bit Definitions of the Questionable Bandwidth Limit Extra Status Condition Register
|
Bit Position |
Name |
Description |
|
0 |
Not used |
Always 0 |
|
1 |
Channel 15 Bandwidth Test Fail (questionable bandwidth limit channel 15 status register summary) |
Set to "1" while one of the enabled bits in the questionable bandwidth limit channel 15 status event register is set to "1." |
|
2 |
Channel 16 Bandwidth Test Fail (questionable bandwidth limit channel 16 status register summary) |
Set to "1" while one of the enabled bits in the questionable bandwidth limit channel 16 status event register is set to "1." |
|
3 - 15 |
Not used |
Always 0 |
Issuing the *CLS command will clear all bits from the questionable bandwidth limit extra status event register.