PRACH Synchronization Timing Diagram

This topic contains the PRACH Frame Timing Alignment and Frame Number Alignment synchronization timing diagrams.

Figure 1 illustrates the frame timing alignment for the PRACH channel. Delay time is defined by the sum of the timing offset and timeslot offset minus the Tp-a value.

Figure 1 PRACH Synchronization – Frame Timing Alignment

Figure 2 illustrates the frame number alignment for the PRACH channel. The frame number is aligned by the frame sync trigger signal from the BTS. Best results are achieved when the frame clock is set to 80 or 2560 ms, or a system frame number reset signal is used. When the synchronization trigger is a frame clock of 10, 20, or 40 ms, the signal generator can align frame timing. However, an 80 ms period must equal the cycle of sub-channel 0 and frame boundary to achieve frame number alignment. (The signal generator’s frame number alignment can be observed on the 80 ms frame pulse from the rear panel.)

Figure 2 PRACH Synchronization – Frame Number Alignment