Signal generation timing synchronization can be achieved with external trigger input from the eNB to the X-Series signal generator. With a CMOS 3.3 V input level applied to the X-Series external input port, the X-Series begins generating the signal with the first trigger input. Subsequent trigger inputs are ignored. In most cases, frame trigger or SFN trigger will be used to synchronize timing between the eNB and X-Series. To synchronize to the frame timing, you need to adjust the X-Series signal generation timing to the next frame after the trigger input, which is 10 ms later. The following figure illustrates the timing between eNB and X-Series.
On X-Series signal generators, the following offsets must be taken into account:
trigger latency (single trigger only): 356 ns + 1 sample clock period, nominal
1 ms internal trigger offset
The trigger latency must be subtracted from the trigger delay so that RF signal generation timing is aligned to frame timing. In addition, with X-Series signal generators, the Signal Studio for LTE applications add a 1 ms trigger offset internally. This means that you need to subtract 1 ms from the trigger delay setting to have the desired delay. When using LTE, one sample clock period is 32.6 ns (for a 30.72 MHz sample rate), so the total trigger latency is 389 ns. Thus, the trigger delay setting is 0.008999611 seconds (= 10 ms - 389 ns - 1 ms). If you want to synchronize to SFN timing, you will need to set the trigger delay to 10.238999611 seconds (= 10.24 s - 389 ns - 1 ms).