Contains Electrical Idle (and Idle Clock Count)

When you are decoding a serial bus that has bursts of serial data followed by long periods of idle time, enabling the Contains Electrical Idle control will remove idle time from the decoded serial data.

Idle Clock Count

When Contains Electrical Idle is enabled, the Idle Clock Count specifies the number of clock periods without a data transition (edge) that indicate an idle condition. This count lets protocol decoders suppress decode for idle data periods on serial data links that go quiescent for a period of time and then restart transmitting.

When an idle condition is identified, clock recovery is "reset", clocks are suppressed for the duration of the idle condition, and PLL clock recovery will have to re-lock when the data restarts transmitting.

The default value for this option is 80, meaning any less than 80 successive 1s or 0s will not cause clock recovery to reset but any more will. You can change this value lower or higher depending upon your data pattern and whether you want the clock recovery to reset or not.