STATus:QUEStionable

Last updated: January 16, 2009

STATus:QUEStionable Condition Register Bit Assignment

The STATus:QUEStionable register contains bits which give an indication that the data currently being acquired or generated is of questionable quality due to some condition affecting the functionality associated with that bit.

Bit Number	Binary Weighting	Condition	Description
15	32768	Not Used. Defined by SCPI.	This bit is always 0.
14	16384	Reserved for future use.	This bit is always 0
13	8192	Reserved for future use.	This bit is always 0.
12	4096	Reserved for future use.	This bit is always 0.
11	2048	QUEStionable:HARDware summary	This bit is the summary message bit for the STATus:QUEStionable:HARDware register.
10	1024	QUEStionable:CALL summary	This bit is the summary message bit for the STATus:QUEStionable:CALL register.
9	512	Reserved for future use.	This bit is always 0.
8	256	Reserved for future use.	This bit is always 0.
7	128	Reserved for future use.	This bit is always 0.
6	64	Reserved for future use.	This bit is always 0.
5	32	Reserved for future use.	This bit is always 0.
4	16	Reserved for future use.	This bit is always 0.
3	8	Reserved for future use.	This bit is always 0.
2	4	Reserved for future use.	This bit is always 0.
1	2	QUEStionable:ERRors summary	This bit is the summary message bit for the STATus:QUEStionable:ERRors register.
0	1	Reserved for future use.	This bit is always 0.

Program Example - STATus:QUEStionable Register Bit Assignments

 
OUTPUT 714;"STATUS:QUESTIONABLE:EVENT?" !Queries and clears the Questionable Event
                                        !Register
OUTPUT 714;"STATUS:QUESTIONABLE:CONDITION?" !Queries and clears the Questionable Condition
                                            !Register
OUTPUT 714;"STATUS:QUESTIONABLE:ENABLE 1024" !Sets the Questionable Enable Register
                                             !for bit 10
OUTPUT 714;"STATUS:QUESTIONABLE:NTRANSITION 2" !Sets the Questionable Negative
                                               !Transition Filter Register for bit 1
OUTPUT 714;"STATUS:QUESTIONABLE:PTRANSITION 2" !Sets the Questionable Positive
                                               !Transition Filter Register for bit 1

STATus:QUEStionable:CALL Condition Register Bit Assignment

The STATus:QUEStionable:CALL registers will contain information about which event(s) occurred during call processing that indicate what call processing procedure failed

Bit Number	Binary Weighting	Condition	Description
15	32768	Not Used. Defined by SCPI.	This bit is always 0.
14	16384	Reserved for future use.	This bit is always 0.
13	8192	Reserved for future use.	This bit is always 0.
12	4096	Reserved for future use.	This bit is always 0.
11	2048	WCDMa Summary bit	This bit is the summary message bit for the STATus:QUEStionable:CALL:WCDMa register.
10	1024	FDD Summary bit	This bit is the summary message bit for the STATus:QUEStionable:CALL:FDD register.
9	512	TA2000 Summary bit	This bit is the summary message bit for the STATus:QUEStionable:CALL:TA2000 register.
8	256	CDMA Summary bit	This bit is the summary message bit for the STATus:QUEStionable:CALL:CDMA register.
7	128	DIGital2000 Summary bit	This bit is the summary message bit for the STATus:QUEStionable:ERRors:CALL:DIGital2000 register.
6	64	DIGital95 Summary bit	This bit is the summary message bit for the STATus:QUEStionable:ERRors:CALL:DIGital95 register.
5	32	TA136 Summary bit	This bit is the summary message bit for the STATus:QUEStionable:CALL:TA136 register.
4	16	DIGital136 Summary bit	This bit is the summary message bit for the STATus:QUEStionable:CALL:DIGital136 register.
3	8	AMPS Summary bit	This bit is the summary message bit for the STATus:QUEStionable:CALL:AMPS register.
2	4	GSM Summary bit	This bit is the summary message bit for the STATus:QUEStionable:CALL:GSM register.
1	2	COMMon Summary bit	This bit is the summary message bit for the STATus:QUEStionable:CALL:COMMon register.
0	1	Extension Bit	This bit is always 0.

Program Example - STATus:QUEStionable:CALL Condition Register Bit Assignment

 
OUTPUT 714;"STATUS:QUESTIONABLE:CALL:EVENT?" !Queries and clears the Questionable
                                             !Call Event Register
OUTPUT 714;"STATUS:QUESTIONABLE:CALL:CONDITION?" !Queries and clears the Questionable
                                                 !Call Condition Register
OUTPUT 714;"STATUS:QUESTIONABLE:CALL:ENABLE 1024" !Sets the Questionable
                                                  !Call Enable Register for bit 10
OUTPUT 714;"STATUS:QUESTIONABLE:CALL:NTRANSITION 2" !Sets the Questionable Call
                                                    !Negative Transition Filter Register
                                                    !for bit 1
OUTPUT 714;"STATUS:QUESTIONABLE:CALL:PTRANSITION 2" !Sets the Questionable Call
                                                    !Positive Transition Filter Register
                                                    !for bit 1

STATus:QUEStionable:ERRors Condition Register Bit Assignment

The STATus:QUEStionable:ERRors register bits will be used to indicate information about test set device-specific errors (positive error numbers).

Bit Number	Binary Weighting	Condition	Description
15	32768	Not Used. Defined by SCPI.	This bit is always 0.
14	16384	Reserved for future use.	This bit is always 0.
13	8192	Reserved for future use.	This bit is always 0.
12	4096	Reserved for future use.	This bit is always 0.
11	2048	WCDMa Summary bit	This bit is the summary message bit for the STATus:QUEStionable:ERRors:WCDMa register.
10	1024	FDD Summary bit	This bit is the summary message bit for the STATus:QUEStionable:ERRors:FDD register.
9	512	TA2000 Summary bit	This bit is the summary message bit for the STATus:QUEStionable:ERRors:TA2000 register.
8	256	CDMA Summary bit	This bit is the summary message bit for the STATus:QUEStionable:ERRors:CDMA register.
7	128	DIGital2000 Summary bit	This bit is the summary message bit for the STATus:QUEStionable:ERRors:DIGital2000 register.
6	64	DIGital95 Summary bit	This bit is the summary message bit for the STATus:QUEStionable:ERRors:DIGital95 register.
5	32	TA136 Summary bit	This bit is the summary message bit for the STATus:QUEStionable:ERRors:TA136 register.
4	16	DIGital136 Summary bit	This bit is the summary message bit for the STATus:QUEStionable:ERRors:DIGital136 register.
3	8	AMPS Summary bit	This bit is the summary message bit for the STATus:QUEStionable:ERRors:AMPS register.
2	4	GSM Summary bit	This bit is the summary message bit for the STATus:QUEStionable:ERRors:GSM register.
1	2	COMMon Summary bit	This bit is the summary message bit for the STATus:QUEStionable:CALL:ERRors register.
0	1	Extension Bit	This bit is always 0.

Program Example - STATus:QUEStionable:ERRors Register Bit Assignments

 
OUTPUT 714;"STATUS:QUESTIONABLE:ERRORS:EVENT?" !Queries and clears the Questionable
                                               !Errors Event Register
OUTPUT 714;"STATUS:QUESTIONABLE:ERRORS:CONDITION?" !Queries and clears the Questionable
                                                   !Errors Condition Register
OUTPUT 714;"STATUS:QUESTIONABLE:ERRORS:ENABLE 1024" !Sets the Questionable
                                                    !Errors Enable
                                                    !Register for bit 10
OUTPUT 714;"STATUS:QUESTIONABLE:ERRORS:NTRANSITION 2" !Sets the Questionable Errors
                                                      !Negative Transition Filter Register
                                                      !for bit 1
OUTPUT 714;"STATUS:QUESTIONABLE:ERRORS:PTRANSITION 2" !Sets the Questionable Errors
                                                      !Positive Transition Filter Register
                                                      !for bit 1

STATus:QUEStionable:ERRors:COMMon Register Bit Assignments

The STATus:QUEStionable:ERRors:COMMon register bits will be used to indicate information about the COMMon test set device-specific errors (positive error numbers).

Bit Number	Binary Weighting	Condition	Description
15	32768	Not Used. Defined by SCPI.	This bit is always 0.
14	16384	Reserved for future use.	This bit is always 0.
13	8192	Reserved for future use.	This bit is always 0.
12	4096	Reserved for future use.	This bit is always 0.
11	2048	Reserved for future use.	This bit is always 0.
10	1024	Reserved for future use.	This bit is always 0.
9	512	+900 Errors	The condition bit is pulsed to a 1 and immediately back to 0 if an error in the +900 to +999 range occurs. After setting the Positive Transition Filter and the Negative Transition Filter you can query the Event Register to find out which of these errors occurred.
8	256	+800 Errors	The condition bit is pulsed to a 1 and immediately back to 0 if an error in the +800 to +899 range occurs. After setting the Positive Transition Filter and the Negative Transition Filter you can query the Event Register to find out which of these errors occurred.
7	128	+700 Errors	The condition bit is pulsed to a 1 and immediately back to 0 if an error in the +700 to +799 range occurs. After setting the Positive Transition Filter and the Negative Transition Filter you can query the Event Register to find out which of these errors occurred.
6	64	+600 Errors	The condition bit is pulsed to a 1 and immediately back to 0 if an error in the +600 to +699 range occurs. After setting the Positive Transition Filter and the Negative Transition Filter you can query the Event Register to find out which of these errors occurred.
5	32	+500 Errors	The condition bit is pulsed to a 1 and immediately back to 0 if an error in the +500 to +599 range occurs. After setting the Positive Transition Filter and the Negative Transition Filter you can query the Event Register to find out which of these errors occurred.
4	16	+400 Errors	The condition bit is pulsed to a 1 and immediately back to 0 if an error in the +400 to +499 range occurs. After setting the Positive Transition Filter and the Negative Transition Filter you can query the Event Register to find out which of these errors occurred.
3	8	+300 Errors	The condition bit is pulsed to a 1 and immediately back to 0 if an error in the +300 to +399 range occurs. After setting the Positive Transition Filter and the Negative Transition Filter you can query the Event Register to find out which of these errors occurred.
2	4	+200 Errors	The condition bit is pulsed to a 1 and immediately back to 0 if an error in the +200 to +299 range occurs. After setting the Positive Transition Filter and the Negative Transition Filter you can query the Event Register to find out which of these errors occurred.
1	2	+100 Errors	The condition bit is pulsed to a 1 and immediately back to 0 if an error in the +100 to +199 range occurs. After setting the Positive Transition Filter and the Negative Transition Filter you can query the Event Register to find out which of these errors occurred.
0	1	Extension Bit	This bit is always 0.

Program Example - STATus:QUEStionable:ERRors:COMMon Register Bit Assignments

 
OUTPUT 714;"STATUS:QUESTIONABLE:ERRORS:COMMON:EVENT?" !Queries and clears the Questionable
                                                      !Errors Common Event Register
OUTPUT 714;"STATUS:QUESTIONABLE:ERRORS:COMMON:CONDITION?" !Queries the and clears the
                                                          !Questionable Errors 
                                                          !Common Condition Register   
OUTPUT 714;"STATUS:QUESTIONABLE:ERRORS:COMMON:ENABLE 1024" !Sets the Questionable
                                                           !Errors Common Enable
                                                           !Register for bit 10
OUTPUT 714;"STATUS:QUESTIONABLE:ERRORS:COMMON:NTRANSITION 2" !Sets the Questionable Errors
                                                             !Common Negative Transition
                                                             !Register for bit 1
OUTPUT 714;"STATUS:QUESTIONABLE:ERRORS:COMMON:PTRANSITION 2" !Sets the Questionable Errors
                                                             !Common Positive Tranasition 
                                                             !Register for bit 1

STATus:QUEStionable:ERRors:FDD Register Bit Assignments

The STATus:QUEStionable:ERRors:FDD register bits will be used to indicate information about FDD related test set device-specific errors (positive error numbers).

Bit Number	Binary Weighting	Condition	Description
15	32768	Not Used. Defined by SCPI.	This bit is always 0.
14	16384	MUI Maskable Message.
13	8192	Reserved for future use.	This bit is always 0.
12	4096	Reserved for future use.	This bit is always 0.
11	2048	Reserved for future use.	This bit is always 0.
10	1024	Reserved for future use.	This bit is always 0.
9	512	+900 Errors	The condition bit is pulsed to a 1 and immediately back to 0 if an error in the +900 to +999 range occurs. After setting the Positive Transition Filter and the Negative Transition Filter you can query the Event Register to find out which of these errors occurred.
8	256	+800 Errors	The condition bit is pulsed to a 1 and immediately back to 0 if an error in the +800 to +899 range occurs. After setting the Positive Transition Filter and the Negative Transition Filter you can query the Event Register to find out which of these errors occurred.
7	128	+700 Errors	The condition bit is pulsed to a 1 and immediately back to 0 if an error in the +700 to +799 range occurs. After setting the Positive Transition Filter and the Negative Transition Filter you can query the Event Register to find out which of these errors occurred.
6	64	+600 Errors	The condition bit is pulsed to a 1 and immediately back to 0 if an error in the +600 to +699 range occurs. After setting the Positive Transition Filter and the Negative Transition Filter you can query the Event Register to find out which of these errors occurred.
5	32	+500 Errors	The condition bit is pulsed to a 1 and immediately back to 0 if an error in the +500 to +599 range occurs. After setting the Positive Transition Filter and the Negative Transition Filter you can query the Event Register to find out which of these errors occurred.
4	16	+400 Errors	The condition bit is pulsed to a 1 and immediately back to 0 if an error in the +400 to +499 range occurs. Query the Event Register to find out if one of these errors occurred.
3	8	+300 Errors	The condition bit is pulsed to a 1 and immediately back to 0 if an error in the +300 to +399 range occurs. After setting the Positive Transition Filter and the Negative Transition Filter you can query the Event Register to find out which of these errors occurred.
2	4	+200 Errors	The condition bit is pulsed to a 1 and immediately back to 0 if an error in the +200 to +299 range occurs. After setting the Positive Transition Filter and the Negative Transition Filter you can query the Event Register to find out which of these errors occurred.
1	2	+100 Errors	The condition bit is pulsed to a 1 and immediately back to 0 if an error in the +100 to +199 range occurs. After setting the Positive Transition Filter and the Negative Transition Filter you can query the Event Register to find out which of these errors occurred.
0	1	Extension Bit	This bit is always 0.

Program Example - STATus:QUEStionable:ERRors:FDD Condition Register Bit Assignment

 
OUTPUT 714;"STATUS:QUESTIONABLE:ERRORS:FDD:EVENT?" !Queries and clears the
                                                          !Questionable Errors
                                                          !FDD Event Register
OUTPUT 714;"STATUS:QUESTIONABLE:ERRORS:FDD:CONDITION?" !Queries and clears the
                                                              !Qestionable Errors
                                                              !FDD Condition Register
OUTPUT 714;"STATUS:QUESTIONABLE:ERRORS:FDD:ENABLE 1024" !Sets the Questionable
                                                               !Errors FDD Enable
                                                               !Register for bit 10
OUTPUT 714;"STATUS:QUESTIONABLE:ERRORS:FDD:NTRANSITION 2" !Sets the Questionable
                                                                 !Errors FDD Negative
                                                                 !Transition Filter
                                                                 !Register for bit 1
OUTPUT 714;"STATUS:QUESTIONABLE:ERRORS:FDD:PTRANSITION 2" !Sets the Questionable
                                                                 !Errors FDD Positive
                                                                 !Transition Filter
                                                                 !Register for bit 1

STATus:QUEStionable:ERRors:WCDMa Register Bit Assignments

The STATus:QUEStionable:ERRors:WCDMa register bits will be used to indicate information about WCDMA related test set device-specific errors (positive error numbers).

Bit Number	Binary Weighting	Condition	Description
15	32768	Not Used. Defined by SCPI.	This bit is always 0.
14	16384	MUI Maskable Message.
13	8192	Reserved for future use.	This bit is always 0.
12	4096	Reserved for future use.	This bit is always 0.
11	2048	Reserved for future use.	This bit is always 0.
10	1024	Reserved for future use.	This bit is always 0.
9	512	+900 Errors	The condition bit is pulsed to a 1 and immediately back to 0 if an error in the +900 to +999 range occurs. After setting the Positive Transition Filter and the Negative Transition Filter you can query the Event Register to find out which of these errors occurred.
8	256	+800 Errors	The condition bit is pulsed to a 1 and immediately back to 0 if an error in the +800 to +899 range occurs. After setting the Positive Transition Filter and the Negative Transition Filter you can query the Event Register to find out which of these errors occurred.
7	128	+700 Errors	The condition bit is pulsed to a 1 and immediately back to 0 if an error in the +700 to +799 range occurs. After setting the Positive Transition Filter and the Negative Transition Filter you can query the Event Register to find out which of these errors occurred.
6	64	+600 Errors	The condition bit is pulsed to a 1 and immediately back to 0 if an error in the +600 to +699 range occurs. After setting the Positive Transition Filter and the Negative Transition Filter you can query the Event Register to find out which of these errors occurred.
5	32	+500 Errors	The condition bit is pulsed to a 1 and immediately back to 0 if an error in the +500 to +599 range occurs. After setting the Positive Transition Filter and the Negative Transition Filter you can query the Event Register to find out which of these errors occurred.
4	16	+400 Errors	The condition bit is pulsed to a 1 and immediately back to 0 if an error in the +400 to +499 range occurs. Query the Event Register to find out if one of these errors occurred.
3	8	+300 Errors	The condition bit is pulsed to a 1 and immediately back to 0 if an error in the +300 to +399 range occurs. After setting the Positive Transition Filter and the Negative Transition Filter you can query the Event Register to find out which of these errors occurred.
2	4	+200 Errors	The condition bit is pulsed to a 1 and immediately back to 0 if an error in the +200 to +299 range occurs. After setting the Positive Transition Filter and the Negative Transition Filter you can query the Event Register to find out which of these errors occurred.
1	2	+100 Errors	The condition bit is pulsed to a 1 and immediately back to 0 if an error in the +100 to +199 range occurs. After setting the Positive Transition Filter and the Negative Transition Filter you can query the Event Register to find out which of these errors occurred.
0	1	Extension Bit	This bit is always 0.

Program Example - STATus:QUEStionable:ERRors:WCDMA Condition Register Bit Assignment

 
OUTPUT 714;"STATUS:QUESTIONABLE:ERRORS:WCDMA:EVENT?" !Queries and clears the
                                                          !Questionable Errors
                                                          !WCDMA Event Register
OUTPUT 714;"STATUS:QUESTIONABLE:ERRORS:WCDMA:CONDITION?" !Queries and clears the
                                                              !Qestionable Errors
                                                              !WCDMA Condition Register
OUTPUT 714;"STATUS:QUESTIONABLE:ERRORS:WCDMA:ENABLE 1024" !Sets the Questionable
                                                               !Errors WCDMA Enable
                                                               !Register for bit 10
OUTPUT 714;"STATUS:QUESTIONABLE:ERRORS:WCDMA:NTRANSITION 2" !Sets the Questionable
                                                                 !Errors WCDMA Negative
                                                                 !Transition Filter
                                                                 !Register for bit 1
OUTPUT 714;"STATUS:QUESTIONABLE:ERRORS:WCDMA:PTRANSITION 2" !Sets the Questionable
                                                                 !Errors WCDMA Positive
                                                                 !Transition Filter
                                                                 !Register for bit 1

STATus:QUEStionable:HARDware Condition Register Bit Assignment

The STATus:QUEStionable:HARDware register bits give an indication that the data/signals currently being acquired or generated are of questionable quality.

Bit Number	Binary Weighting	Condition	Description
15	32768	Not Used. Defined by SCPI.	This bit is always 0.
14	16384	Reserved for future use.	This bit is always 0.
13	8192	Reserved for future use.	This bit is always 0.
12	4096	Reserved for future use.	This bit will always be 0.
11	2048	Reserved for future use.	This bit will always be 0.
10	1024	Reserved for future use.	This bit will always be 0.
9	512	Reserved for future use.	This bit will always be 0.
8	256	Reserved for future use.	This bit will always be 0.
7	128	Reserved for future use.	This bit will always be 0.
6	64	Reserved for future use.	This bit will always be 0.
5	32	Reserved for future use.	This bit will always be 0.
4	16	Power-up Self Test(s) Failed	This bit will be a 1 if the power-up self tests failed.
3	8	Reserved for future use.	This bit will always be 0.
2	4	Reserved for future use.	This bit will always be 0.
1	2	Reserved for future use.	This bit will always be 0.
0	1	Extension Bit.	This bit will always be 0.

Program Example - STATus:QUEStionable:HARDware Condition Register Bit Assignment

 
OUTPUT 714;"STATUS:QUESTIONABLE:HARDWARE:EVENT?" !Queries and clears the Questionable
                                                 !Hardware Event Register
OUTPUT 714;"STATUS:QUESTIONABLE:HARDWARE:CONDITION?" !Queries and clears the Questionable
                                                     !Hardware Condition Register
OUTPUT 714;"STATUS:QUESTIONABLE:HARDWARE:ENABLE 1024" !Sets the Questionable
                                                      !Hardware Enable
                                                      !Register for bit 10
OUTPUT 714;"STATUS:QUESTIONABLE:HARDWARE:NTRANSITION 2" !Sets the Questionable
                                                        !Hardware Negative Transition Filter
                                                        !Register for bit 1
OUTPUT 714;"STATUS:QUESTIONABLE:HARDWARE:PTRANSITION 2" !Sets the Questionable 
                                                        !Hardware Positive Transition Filter
                                                        !Register for bit 1