Static and Dynamic RDS,ON
Static RDS,ON
Static RDS,ON extraction does not follow a standard. It can be measured for all devices – Si, SiC, GaN, etc.
This was implemented in previous versions of the PD1000A software. However, the method of extraction has changed.
Device types Discrete Module IGBT, Enhancement, Si Yes No FET, Enhancement, Si Yes No FET, Enhancement, SiC Yes No FET, Enhancement, GaN, vertical Yes No FET, Enhancement, GaN, Cascode Yes No FET, Enhancement, GaN, eHEMT Yes No FET, Enhancement, GaN, GIT Yes No FET, Depletion, Si Yes No FET, Depletion, SiC Yes No FET, Depletion, GaN, vertica l Yes No FET, Depletion, GaN, Cascode Yes No FET, Depletion, GaN, eHEMT Yes No FET, Depletion, GaN, GIT Yes No
The old (legacy) method:
- Measure time of 95% test current.
- Measure clamp voltage and gate voltage at 95% test current time.
- Divide clamp voltage by 95% test current The result is RON.
- Output: 95 % test current, clamp voltage, RON, and gate voltage
- Filters: both the clamp voltage and the current channel values are low pass filtered with a frequency of 80 MHz.
The method used with PD1000A Software version 2022.321(and later):
- Measure time t of latest 100 % value of VGS.
- At this time t, measure clamp voltage, gate voltage, and output current.
- Filters: both the clamp voltage and the current channel values are low pass filtered with a frequency of 80 MHz.
- Result of the division at the time t is RON
Dynamic RDS,ON
Dynamic RON is an effect of lateral GaN transistors. It appears due to the charge trapping phenomenon. It does not apply to any Si or SiC devices. JEDEC’s standard JEP 173 describes how to extract dynamic RON parameter for GaN HEMT transistors for both enhancement and depletion-mode. This standard can be applied to all discrete lateral GaN power transistors but also integrated power solutions and in wafer and package levels.
| Device types | Discrete Standard | Module Standard |
|---|---|---|
| IGBT, Enhancement, Si | No | No |
| FET, Enhancement, Si | No | No |
| FET, Enhancement, SiC | No | No |
| FET, Enhancement, GaN, vertical | No | No |
| FET, Enhancement, GaN, Cascode | JEDEC JEP 173 | JEDEC JEP 173 |
| FET, Enhancement, GaN, eHEMT | JEDEC JEP 173 | JEDEC JEP 173 |
| FET, Enhancement, GaN, GIT | JEDEC JEP 173 | JEDEC JEP 173 |
| FET, Depletion, Si | No | No |
| FET, Depletion, SiC | No | No |
| FET, Depletion, GaN, vertical | No | No |
| FET, Depletion, GaN, Cascode | JEDEC JEP 173 | JEDEC JEP 173 |
| FET, Depletion, GaN, eHEMT | JEDEC JEP 173 | JEDEC JEP 173 |
| FET, Depletion, GaN, GIT | JEDEC JEP 173 | JEDEC JEP 173 |
The test setup is a normal double-pulse test with clamped inductive or clamped inductive-resistive load in series. To properly measure VDS,ON a clamp circuit must be included due to the limitations of the oscilloscope precision. The dynamic RDS,ON is measured at a certain time tm.on.