Backplane (BACKPLANE) Resource

This section contains information specific to the Windows product.

This topic describes the PXI/VXI Backplane (BACKPLANE) Resource that encapsulates the operations and properties of the backplane in a PXI or VXIbus system.

BACKPLANE Resource Overview

A VISA BACKPLANE Resource, like any other resource, starts with the basic operations and attributes of the VISA Resource Template. For example, modifying the state of an attribute is done via the operation viSetAttribute, which is defined in the VISA Resource Template.

Although the BACKPLANE resource does not have viSetAttribute listed in its operations, it provides the operation because it is defined in the VISA Resource Template. From this basic set, each resource adds its specific operations and attributes that allow it to perform its dedicated task.

The BACKPLANE Resource lets a controller query and manipulate specific lines on a specific mainframe in a given VXI or PXI system. Services are provided to map, unmap, assert, and receive hardware triggers, and also to assert various utility and interrupt signals. This includes advanced functionality that may not be available in all implementations or all vendors' controllers.

A VXI system with an embedded CPU with one mainframe will always have exactly one BACKPLANE resource. Valid examples of resource strings for this are VXI0::0::BACKPLANE and VXI::BACKPLANE. A multi-chassis VXI system may provide only one BACKPLANE resource total, but the recommended way is to provide one BACKPLANE resource per chassis, with the resource string address corresponding to the attribute VI_ATTR_MAINFRAME_LA. If a multi-chassis VXI system provides only one BACKPLANE resource, it is assumed to control the backplane resources in all chassis.

A PXI system will contain one BACKPLANE resource for each configured chassis, with the resource string address corresponding to the attribute VI_ATTR_PXI_CHASSIS.

Some VXI or GPIB-VXI implementations view all mainframes in a VXI system as one entity. In these configurations, separate BACKPLANE resources are not possible.

BACKPLANE Resource Attributes

Attribute Name

Access Privileges

Data Type

Range

Default

Generic BACKPLANE Resource Attributes

VI_ATTR_INTF_INST_NAME

RO

Global

ViString

N/A

N/A

VI_ATTR_INTF_NUM

RO

Global

ViUInt16

0 to FFFFh

0

VI_ATTR_INTF_TYPE

RO

Global

ViUInt16

VI_INTF_VXI
VI_INTF_GPIB_VXI

N/A

VI_ATTR_TMO_VALUE

RW

Local

ViUInt32

VI_TMO_IMMEDIATE
1 to FFFFFFFEh
VI_TMO_INFINITE

2000 msec.

VI_ATTR_TRIG_ID

RW

Local

ViInt16

VI_TRIG_SW
VI_TRIG_TTL0 to VI_TRIG_TTL11
VI_TRIG_ECL0 to VI_TRIG_ECL1
VI_TRIG_STAR_SLOT1 to VI_TRIG_START_SLOT12
VI_TRIG_STAR_VXI0 to VI_TRIG_STAR_VXI2

N/A

VXI and GPIB-VXI Specific BACKPLANE Resource Attributes

VI_ATTR_MAINFRAME_LA

RO

Global

ViInt16

0 to 255
VI_UNKNOWN_LA

N/A

VI_ATTR_VXI_TRIG_STATUS

RO

Global

ViUInt32

N/A

N/A

VI_ATTR_VXI_TRIG_SUPPORT

RO

Global

ViUInt32

N/A

N/A

VI_ATTR_VXI_VME_INTR_STATUS

RO

Global

ViUInt16

N/A

N/A

VI_ATTR_VXI_VME_SYSFAIL_STATE

RO

Global

ViInt16

VI_STATE_ASSERTED
VI_STATE_UNASSERTED
VI_STATE_UNKNOWN

N/A

PXI Specific BACKPLANE Resource Attributes

VI_ATTR_MANF_NAME

RO

Global

ViString

N/A

N/A

VI_ATTR_MODEL_NAME

RO

Global

ViString

N/A

N/A

VI_ATTR_PXI_CHASSIS

RO

Global

ViInt16

1 to 32767
VI_UNKNOWN_CHASSIS

N/A

VI_ATTR_PXI_TRIG_BUS

RW

Local

ViInt16

-1, 1 to 3

N/A

VI_ATTR_PXI_SRC_TRIG_BUS

RW

Local

ViInt16

-1, 1 to 3

N/A

VI_ATTR_PXI_DEST_TRIG_BUS

RW

Local

ViInt16

-1, 1 to 3

N/A

BACKPLANE Resource Attribute Descriptions

Attribute Name

Description

Generic BACKPLANE Resource Attributes

VI_ATTR_INTF_INST_NAME

Human-readable text describing the given interface.

VI_ATTR_INTF_NUM

Board number for the given interface.

VI_ATTR_INTF_TYPE

Interface type of the given session.

VI_ATTR_TMO_VALUE

Minimum timeout value to use, in milliseconds. A timeout value of   VI_TMO_IMMEDIATE means that operations should never wait for the device to respond. A timeout value of   VI_TMO_INFINITE disables the timeout mechanism.

VI_ATTR_TRIG_ID

Identifier for the current triggering mechanism.

VXI and GPIB-VXI Specific BACKPLANE Resource Attributes

VI_ATTR_MAINFRAME_LA

This is the logical address of a given device in the mainframe, usually the device with the lowest logical address. Other possible values include the logical address of the
Slot 0 controller or of the parent-side extender. Often, these are all the same value.

The purpose of this attribute is to provide a unique ID for each mainframe. A VISA manufacturer can choose any of these values, but must be consistent across mainframes. If this value is not known, the attribute value returned is VI_UNKNOWN_LA.

VI_ATTR_VXI_TRIG_STATUS

This attribute shows the current state of the VXI trigger lines. This is a bit vector with bits 0-9 corresponding to VI_TRIG_TTL0 through VI_TRIG_ECL1.

VI_ATTR_VXI_TRIG_SUPPORT

This attribute shows which VXI trigger lines this implementation supports. This is a bit vector with bits 0-9 corresponding to VI_TRIG_TTL0 through VI_TRIG_ECL1. Keysight VISA also returns 12 to indicate VI_TRIG_PANEL_IN for received triggers and VI_TRIG_PANEL_OUT for asserted triggers on Keysight VXI controllers.

VI_ATTR_VXI_VME_INTR_STATUS

This attribute shows the current state of the VXI/VME interrupt lines. This is a bit vector with bits 0-6 corresponding to interrupt lines 1-7.

VI_ATTR_VXI_VME_SYSFAIL_STATE

This attribute shows the current state of the VXI/VME SYSFAIL (SYStem FAILure) backplane line.

PXI Specific BACKPLANE Resource Attributes

VI_ATTR_MANF_NAME

This string attribute is the chassis manufacturer's name.

VI_ATTR_MODEL_NAME

This string attribute is the model name of the chassis.

VI_ATTR_PXI_CHASSIS

This attribute specifies the PXI chassis number of this resource.

VI_ATTR_PXI_TRIG_BUS

This attribute specifies the segment to use in calls to viAssertTrigger.

VI_ATTR_PXI_SRC_TRIG_BUS

This attribute specifies the segment to use to qualify trigSrc in calls to viMapTrigger.

VI_ATTR_PXI_DEST_TRIG_BUS

This attribute specifies the segment to use to qualify trigDest in calls to viMapTrigger.

BACKPLANE Resource Events

This resource defines the following events for communication with applications, where AP = Access Privilege.

VI_EVENT_TRIG - Notification that a trigger interrupt was received from the backplane. For VISA, the only triggers that can be sensed are VXI hardware triggers on the assertion edge (SYNC and ON trigger protocols only).

Event Attribute

Description

AP

Data Type

Range

VI_ATTR_EVENT_TYPE

Unique logical identifier of the event.

RO

ViEventType

VI_EVENT_TRIG

VI_ATTR_RECV_TRIG_ID

The identifier of the triggering mechanism on which the specified trigger event was received.

RO

ViInt16

VI_TRIG_TTL0 to VI_TRIG_TTL11;
VI_TRIG_ECL0 to VI_TRIG_ECL5;
VI_TRIG_STAR_SLOT1 to VI_TRIG_STAR_SLOT12

 

VI_EVENT_VXI_VME_SYSFAIL - Notification that the VXI/VME SYSFAIL* line has been asserted.

Event Attribute

Description

AP

Data Type

Range

VI_ATTR_EVENT_TYPE

Unique logical identifier of the event.

RO

ViEventType

VI_EVENT_VXI_VME_SYSFAIL

 

VI_EVENT_VXI_VME_SYSRESET - Notification that the VXI/VME SYSRESET* line has been reset.

Event Attribute

Description

AP

Data Type

Range

VI_ATTR_EVENT_TYPE

Unique logical identifier of the event.

RO

ViEventType

VI_EVENT_VXI_VME_SYSRESET

BACKPLANE Resource Operations

viAssertTrigger (vi, protocol)

viAssertUtilSignal(vi, line)

viAssertIntrSignal(vi, mode, statusID)

viMapTrigger(vi, trigSrc, trigDest, mode)

viUnmapTrigger(vi, trigSrc, trigDest)

viPxiReserveTriggers(vi, cnt, trigBuses, trigLines, failureIndex)