Logic Analyzer Software Setup
Logic Analyzer software setup involves the following steps:
- Define probes
- Define and name signal buses
- Add a Software Tool
- Define triggering
- Configure acquisition mode
- Configure the state sampling clock
- Select Force Prestore
- Set trigger position
- Set acquisition depth
- Test and save the setup and data
The Menu Paths listed in this section are Logic Analyzer menu paths.
Define probes
Menu Path (Logic Analyzer):
Set up probe configurations that match the hardware connections. Click Help on the General Purpose Probe Set dialog box for details.
Define and name signal buses
Menu Path (Logic Analyzer):
A bus is a collections of logic analyzer channels representing a group of associated signals, such as ADDR or DATA. The bus names will be used by the VSA application to identify digital signals. Before the Logic Analyzer can acquire data, the buses and signals must be defined by:
- Adding bus/signal names
- Assigning Logic Analyzer channels to bus/signal names
For example, 10 lines from Slot A Pod 1 may be connected to the device's bus carrying the in-phase data. In the Bus/Signals dialog, add a bus called I and click in the grid representing the pod channels to map the channels into the I bus. (The bus names in this example are arbitrary; choose any name for a bus.) 10 lines from Slot B Pod 2 may be connected to the device's bus carrying quadrature data. Define a new bus called Q and assign these channels to it.
For multiple channel measurements, repeat the above for each channel, giving unique names for each bus defined. Note that data for all channels in a measurement must all come from a single hardware module, derived from a common clock.
For more information on defining and naming signal buses, see, "Defining Buses and Signals" in the Logic Analyzer on-line help.
Add a Software Tool (optional)
Beginning with revision 3.50 of the Logic Analyzer Application, the VSA can also input data from selected Logic Analyzer software Tools. The first supported Tool is the Signal Extractor, which provides flexible de-serialization of serial data, or serialization of several parallel buses into one bus. For more information about setting up and using the Signal Extractor see "Using the Signal Extractor Tool".
1) The VSA will only take data from software Tools that receive their input from hardware modules. The VSA will not receive data from a Tool whose input is another Tool’s output.
2) If the Signal Extractor Start Sample and End Sample properties are used in conjunction with VSA external triggering, make sure that input sample 0 is included in the set. Otherwise the trigger time correlation may not be correct or the VSA may fail to trigger.
Multiple Channel Measurements
For multiple channel measurements, set up separate software Tools in parallel, each channel connected to the same hardware module. All channels must be configured so that the data at each Tool’s output is synchronous with the other channels. This means 1) that the effective sample rate is the same and 2) sample 0 for each Tool’s output buses represent the same instant in time (the trigger point). The bus names at the outputs of each Tool can be the same as bus names of another Tool instance. However, the Tool names must be unique.
Define triggering
Menu Path (Logic Analyzer):
Triggering (including data storage qualification) must be defined on the Logic Analyzer. For more information on Logic Analyzer triggering, see the topic under "Capturing Data from the Device Under Test" in the Logic analyzer on-line help.
The VSA trigger menu () generally only enables free-run triggering when using a Logic Analyzer, but when the VSA is set to use Block mode (see Configure Logic Analyzer Hardware Data Mode) and the Logic Analyzer is making online measurements, the VSA trigger menu chooses external triggering and an associated pre- or post-trigger delay.
When the 89600 VSA trigger style is free-run, there is no relationship between the measurement time displayed on the VSA and the Logic Analyzer trigger point.
When the 89600 VSA trigger style is external, the VSA associates time 0 with the Logic Analyzer sample 0 plus any trigger delay. This enables the logic analyzer to trigger on a convenient data pattern and to set the VSA analysis to a fixed time offset from the trigger position. The Logic analyzer Trigger Position controls how much data is captured before the trigger (sample 0) and how much data is captured after (as a percentage of the entire acquisition depth). The 89600 VSA takes its time record from within the larger Logic Analyzer buffer depending on the 89600 trigger delay setting. For information on defining the VSA trigger setup, see define triggering.
Configure acquisition mode
Menu Path (Logic Analyzer):
Select State for the Acquisition Mode. This is a requirement for linking the Logic Analyzer with the 89600 VSA. (For more information, see "Selecting the State Mode" in the Logic Analyzer on-line help.)
Configure the state sampling clock
Menu Path:
Configure the state sampling clock according to the clock connection made to the hardware. For example, the clock line of Slot A Pod 1 may be connected to the device's data clock and the data is stable on the rising edge of the clock. In the Sampling dialog, click the button under pod 1 and select Rising Edge.
Select Force Prestore
Menu Path (Logic Analyzer):
Logic Analyzer software revisions 03.30.0002 and lower do not have the Force Prestore feature. If the Logic Analyzer software does not have the Force Prestore feature, it is recommended to set the Logic Analyzer Trigger Position to 100% poststore. In the Logic Analyzer application, click and slide the Trigger Position to 100% poststore.
When using a Logic Analyzer controlled by an 89600 VSA, select Force Prestore. If Force Prestore is not selected, there is no guarantee that any pretrigger data will be stored. As a result, the VSA will only read post-trigger data.
Set trigger position
Menu Path (Logic Analyzer):
Sometimes the data of interest is not at the trigger event but at a fixed time before or after it. Set the trigger position and acquisition depth so that the Logic Analyzer buffer will capture the data of interest.
The Trigger Position specifies the amount of trace memory used for samples captured after the trigger. For example, when 20% poststore is selected, 80% of trace memory is used for samples captured before the trigger. When 80% poststore is selected, 20% of trace memory is used for samples captured before the trigger.
The Trigger Position (% poststore) and Acquisition Depth are set according to the trigger delay and time record length (block size) intended to set on the 89600 VSA. The following formulas can be used to approximate the proper settings for Trigger Position and Acquisition Depth:
Maximum Post Trigger Delay = ((Acq Depth)(%poststore / 100) - block size ))/ sample rate
Maximum Pre Trigger Delay = ((Acq Depth)(1 - %poststore / 100) - block size )) / sample rate
Acquisition depth and trigger position (%poststore) are set on the Logic Analyzer. Trigger delay and sample rate are set in the 89600 VSA software.
Set acquisition depth
Menu Path (Logic Analyzer):
If the 89600 VSA Data Mode is Continuous, set the acquisition depth to the number of data samples wanted to analyze without gaps in the data. In continuous mode, the VSA commands the Logic Analyzer to run a single measurement, then takes the data needed for one VSA measurement from the Logic Analyzer buffer. If there is sufficient unused data in the buffer, then the VSA takes data for succeeding measurements by moving through the Logic Analyzer buffer, until the data is exhausted.
For example, if an acquisition depth of 16K is chosen and the VSA is set up to require time record length of 372 points, then the VSA will take 372 points from the Logic Analyzer buffer and process them, then take the next 372 points from the buffer, and so on until 43 time records have been processed. Then the VSA commands the Logic Analyzer to run another measurement and continues from the start of the new data. (If overlap processing is enabled, even more records will be processed before another run command. See Overlap Processing in the VSA on-line help.)
If the 89600 VSA Data Mode is Block, the VSA commands the Logic Analyzer to run before every VSA measurement. If the 89600 VSA is set to block mode with a free run trigger, avoid setting the acquisition depth much larger than needed for a measurement because it slows down the measurement. If the 89600 VSA is set to block mode with an external trigger, the correct acquisition depth selection depends on the Logic Analyzer trigger position the amount of pre- or post-trigger delay and the time record length set on the 89600 VSA.
The Acquisition Depth and Trigger Position (% poststore) are set according to the trigger delay and time record length (block size) intended to set on the 89600 VSA. The following formulas can be used to approximate the proper settings for Acquisition Depth and Trigger Position:
Maximum Post Trigger Delay = ((Acq Depth)(%poststore / 100) - block size )) / sample rate
Maximum Pre Trigger Delay = ((Acq Depth)(1 - %poststore / 100) - block size )) / sample rate
Acquisition depth and trigger position (%poststore) are set on the Logic Analyzer. Trigger delay and sample rate are set on the 89600 VSA.
Test and save the setup and data
When done with the setup, save it to a file (setup only) for later recall. It is helpful to run the Logic Analyzer to see if the setup does what is expected. Timing Zoom may be turned on to collect a window of additional high-speed timing data around the trigger of the Logic Analyzer. If Timing Zoom is selected, it's recommended that the selection is cleared before saving the state and any data. Clearing the Timing Zoom selection helps avoid large files and long run times. In the Logic Analyzer application, click and clear the check box.
Bus data may be viewed as a chart in the Logic Analyzer waveform window. This is an oscilloscope-like display of the numeric values of the bus samples. See Logic Analyzer help topic "To view bus data as a chart." If the data is two's complement, right-click on the bus name and click .
See Also
