Testing SP6T RF switch using PXIe VNA and M9341B I/O Module

This example shows a procedure for testing a SP6T RF switch with the PXIe VNA based AMX system. The DUT mode (switch state) is controlled with the M9341B PXIe Digital and Analog I/O module. To edit the multimode DUT test plan efficiently, Microsoft Excel is used in combination with the AMX Test Plan Builder.

 

Test conditions

Instruments:

M937xA PXIe VNA, M9341B PXIe Digital and Analog I/O Module

Test parameters

Insertion loss & isolation between RF input and RF output ports in 6 DUT modes.

Calibration:

Full 7-port calibration

Test specs:

  • 100 MHz to 6 GHz, NOP=201, Power=0 dBm, IFBW=100 kHz (1 segment)

  • Insertion loss maximum limit = from 5 dB (at 100 MHz) to 10 dB (at 6 GHz)

  • Isolation minimum limit = from 35 dB (at 100 MHz) to 20 dB (at 6 GHz)

DUT mode control:

(Parallel Control Example)

 

3-bit parallel control voltages, logic level 3.3 V (same as Vdd level)

DUT mode

AMX label

Parallel control

Mode 1 (=RFoutput1)

"Out1"

001

Mode 2 (=RFoutput2)

"Out2"

010

Mode 3 (=RFoutput3)

"Out3"

011

Mode 4 (=RFoutput4)

"Out4"

100

Mode 5 (=RFoutput5)

"Out5"

101

Mode 6 (=RFoutput6)

"Out6"

110

Vdd and parallel control voltages are turned on and off before starting and after completing the DUT test sequence.

(RFFE Control Example)

  • VIO level=1.8 V, RFFE signal level=1.8 V

  • 1 MHz clock

  • RFFE address and data for DUT mode control;

DUT mode

AMX label

Slave Address

Register Address

Data

Mode 1 (=RFoutput1)

"Out1"

0A

01

01

Mode 2 (=RFoutput2)

"Out2"

0A

01

02

Mode 3 (=RFoutput3)

"Out3"

0A

01

03

Mode 4 (=RFoutput4)

"Out4"

0A

01

04

Mode 5 (=RFoutput5)

"Out5"

0A

01

05

Mode 6 (=RFoutput6)

"Out6"

0A

01

06

Vdd 3.3 V and VIO 1.8 V must be turned on and off before starting and after completing the DUT measurement.  

RF Signal Connection

VNA

DUT

Port 1

RF Input 1

Port 2

RF Output 1

Port 3

RF Output 2

Port 4

RF Output 3

Port 5

RF Output 4

Port 6

RF Output 5

Port 7

RF Output 6

M9341B Configuration

I/O 8 bit Digital I/O Port

Pin No.

Description

Group

Example 1: Parallel control

Example 2: RFFE control

1

Data1

1

V1

RFFE clock

2

Data2

V2

RFFE data

3

Data3

2

V3

N/A

4

Data4

N/A

N/A

5

Data5

3

N/A

N/A

6

Data6

N/A

N/A

7

Data7

4

N/A

N/A

8

Data8

N/A

N/A

9

N/A

     

10

N/A

     

11

N/A

     

12

Vout

 

Not be used in this example because this DC voltage cannot be turned off and on quickly.

13

N/A

     

14

N/A

     

15

GND

     

Analog Out 1 and 2

Used for providing Vdd (and Vio for RFFE) in this example. Convertible to BNC connectors by using MCX(f)-BNC(m) cables. (included in M9341B option 001 “Interface cables for M9341B” ).

Test Procedure for this Example

Using Excel template function allows you to create your test plan more easily and quickly when your configuration has many test steps and many parameters for modes and connections. In this example, the setups for Test Step and Mode in test plan is configured on the Excel application using an Excel template.

Generating Excel template from Test Plan Builder

  1. Launch the AMX Test Plan Builder and File > New

  2. Enter the basic information on the DUT and Instruments, which are required for generating the Excel template in the next step.

DUT Tab

  • Number of DUT logical ports: 7

  • Labels of DUT logical ports :

    • 1: “RFinput”, 2 to 6: “RFoutput1” to “RFoutput6”

  • Number of DUT modes: 6

  • Labels of DUT modes:

    • Mode 1: “Out1”

    • Mode 2: “Out2”

    • Mode 3: “Out3”

    • Mode 4: “Out4”

    • Mode 5: “Out5”

    • Mode 6: “Out6”

  • Mode Coupled: Checked

Instrument Tab

  • VNA

    • Number of ports: 8

  1. In the Test Steps tab, click [Generate Template…] to generate the Excel template file (.xlsx) where you are going to create the DUT test plan from now.


Modifying Excel Template on Excel application to complete the Test Plan

  1. Open the generated Excel template file by the Excel application.

  2. The Excel template file includes the test step, the parameters for each modem and the parameters for each connection. The other configuration should be setup in AMX test plan builder.

Spec Sheet Tab Configuration

  1. In the “Spec Sheet” tab, click "B2" cell under "mode_label", then select "Mode1 (Out1) from pull-down menu.

  2. Setup the second row ("B") according to the DUT test conditions, by selecting the items from the pulldown menu or typing the value.

  3. Right-click on any cells in the second row ("B") and select “Insert” > "Table Row Below" from the Excel popup menu. The same pull down menus are available in the inserted row.

  4. Complete the DUT test conditions and specs as shown below

Mode Tab Configuration

In the “Mode” tab, enter the M9341B  control sequence as follows. See the Controlling M9341B I/O Module for the control parameters.

Parallel Control Example

RFFE Control Example

Export the updated test plan (xml) from Excel

  1. When you complete editing the DUT test plan including the M9341B control sequence, save it as an Excel .xlsx file with your desired filename. This file is for future edit, just in case.

  2. Save this as the XML file by adding “.ss” to the filename, for example, “DUTtestplan.ss.xml”.

Building the TAP test sequence file

  1. Go back to the Test Steps tab of the AMX Test Plan Builder where you generated the Excel template.

  2. Click [Import Spec Sheet…] and import the ss.xml file you generated. The DUT test plan and the DUT mode control sequence created in the Excel file will be imported to the AMX Test Plan Builder.

  3. Confirm that the information in the Excel file is correctly imported by opening each mode in the Test Steps and DUT tabs.



  4. In the menu bar, select “File” -> “Save As…” and save the test plan file (.tpbproj).

  5. In the Output tab, click [Output Test Plan…] to build and output the TAP test sequence file (.TapPlan) to be executed on the TAP.

Preparation for executing the DUT test sequence

  1. Copy the generated TapPlan file to the PXIe controller.

  2. Launch the TAP on the PXIe controller.

  3. In the menu bar, select “Settings” -> “Bench” -> “Instruments” to open the Bench Settings dialog.

  4. Select the bench profile you are going to use (“Site 1” in this example).

  5. Add “VNA”, “TSMon”, and “No Action” if they are not listed in this dialog.

  6. Delete “DUTMon” if it is listed.

  7. Add “M9341B” and enter the VISA address of the M9341B I/O module. The M9341B’s VISA address can be confirmed by opening the Keysight IO Libraries

Setup sweep

  1. Load the .TapPlan file.

  2. Run the TapPlan to execute the initial setup sweep for setting up the VNA.

Calibration

  1. Confirm that the 4-port ECal module is connected to the PXIe controller.

  2. In the menu bar, select “Settings” -> “AMX/AMX” to launch the Cal Wizard. Execute the full 7-port cal by following the guidance.

  3. In the case of test plans consisting of a lot of modes and VNA channels, it is recommended NOT to use the ECal “Auto Orientation” function for faster execution of the Cal Wizard.

    Once you complete the calibration with the Cal Wizard, you can skip the setup sweep to shorten the test preparation time from the next time, by checking “Skip Setup” in the “Settings (VNA S-Param)” step.

Executing the DUT test sequence

  1. Connect the DUT to the VNA and M9341B.

  2. Connect the TAP resource by clicking

  3. Run the TapPlan to execute the test. Now the DUT test sequence is executed and test results are displayed as shown below