Step 3. Receiver Setup

FlexPLL Essentials

Consider Your DUT!

Is the DUT's output a clock or data? Is the output a sub or super rate of the input? If output is not the same as the input, after the Calibration, in this dialog change the Receiver's Symbol Rate input to match DUT's output. This does not affect the calibration.

Use the System Setup dialog's Receiver Setup tab to connect and configure a supported Receiver. Clock Data Receiver (CDR) settings that you make in this dialog are immediately sent to and configure the Receiver.

Always configure the Receiver's output using the fields in this dialog. Making these changes directly on the Receiver can cause the FlexPLL test setup to be unstable.

  1. Click Setup > Receiver Setup to open the System Setup dialog and select the Receiver tab. Or, click the Receiver button located at the bottom of the application.

  2. In the dialog's Receiver tab, click Setup to open the DCA Connection Setup dialog. Make the DCA connection settings, and then click Connect to DCA. If your DUT has a differential output, we recommend that you specify differential

  3. After connecting to the Receiver, select the receiver's input on which the Receiver will perform clock recovery. This may be a differential, single ended, or auxiliary input depending on the Receiver.
  4. Enter the signal's Frequency or Symbol Rate. When the source is an 81160A, the source signal is always a square wave. However, if the source is a supported M8000-series BERT, you have the option to specify whether the Source signal is a clock (Hz) or a data signal (baud, Bd). The default setting is 100 MHz. The minimum setting is 1 Hz and the maximum is 500 MHz. This value should be the output of the Source.
  5. Enter the desired Loop Bandwidth used in the Receiver's PLL.
  6. Selecting Auto Loop Select forces FlexPLL to use the Receiver's CDR Type 2 Loop settings. For normal operation, Auto Loop Select is selected, and provides the desired loop characteristic for most measurements. It is recommended that you leave this setting selected.
  7. If Auto Loop Select is cleared, use Type 2 Loop to enter to Type 2 Loop transition frequency used in the receiver's CDR PLL. Normally, you would not want to manually change the loop characteristics. However, some signals have very large low-frequency jitter from either extremely dirty clocks or intentional modulated clocks such as found in SSC (spread spectrum clocking). To ensure the most accurate measurements, FlexPLL allows you to adjust these settings but limits control of the loop dynamics.
  8. Do not click Lock , which locks the Receiver's clock recovery. During a Calibration, an adapter replaces the DUT, and the Receiver's CDR does not need to be locked. After a Response calibration completes, FlexPLL automatically locks the Receiver.