Operation Status Registers

Operation Status Registers Commands

The Operation Status Register is a mid-level summary register in the status reporting structure. It contains summary bits that monitor activity in the other status registers and queues. The Operation Status Register is a live register. That is, its summary bits are set and cleared by the presence and absence of a summary bit from other event registers or queues.

Like other status registers, there is an event register (see :STATus:OPERation:EVENt?) that shows events and an enable register (see :STATus:OPERation:ENABle) that allows these events to pass on to bit 7 (OPER) of the Status Byte Registers.

Operation Status Register Bits
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Bit

Weight		 32,768 16,384 8,192 4,096 2,048 1,024 512 256 128 64 32 16 8 4 2 1
Event
Register		 — CAL OVLD-ALL OVLD — — LTEST CLIP-ALL CLIP — — — — — TRIG ADER
Enable

Register		                                
Sets to Bit 7 (OPER) of Status Byte Register

The Operation Status Register, depending on the respective enable register masks, can collect information from these reporting registers: