:STATus:OPERation:ENABle
Instrument:
N1010A
DCA-X
DCA-M
Meas. mode:
Scope
Eye
Jitter
TDR
Flex Apps:
FlexDCA
FlexRT
FlexPLL
Command Syntax
:STATus:OPERation:ENABle <mask>
<mask> is an integer, 0 to 255, representing a mask for the bits in the event register.
Query Syntax
:STATus:OPERation:ENABle?
Description
Use the operation enable register to mask the ability to report bits in the operation event register.
| Register | Read | Write | Command |
|---|---|---|---|
| Event | ♦ | :STATus:OPERation:EVENt? | |
| Enable (mask) | ♦ | ♦ | :STATus:OPERation:ENABle |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Bit Weight |
32,768 | 16,384 | 8,192 | 4,096 | 2,048 | 1,024 | 512 | 256 | 128 | 64 | 32 | 16 | 8 | 4 | 2 | 1 |
| Event Register |
— | CAL | — | JIT | PTIME | MTEST | ACQ | LTEST | CLCK | RDCA | — | DAS | LLINE | — | — | — |
| Enable Register |
||||||||||||||||
| Sets |
 to Bit 7 (OPER) of Status Byte Register |
|||||||||||||||
Bit Definitions
- ACQ
- A true indicates that an enabled bit in the acquisition event status register has been set and that the data acquisition has satisfied the specified completion criteria.
- CAL
- A true indicates that an enabled bit in the calibration event status register has been set by a calibration completing.
- CLCK
- A true indicates that an enabled bit in the clock recovery event status register has been set.
- DAS
- A true indicates that an enabled bit in the REPository (Repository) event status register has been set.
- JIT
- A true indicates that an enabled bit in the jitter event status register has been set. This occurs when there is a failure or an Auto Scale is needed.
- LLINE
- A true indicates that an enabled bit in the limit line event status regiser has been set by a limit-line based limit test completing or failing.
- LTEST
- A true indicates that an enabled bit in the limit test event status register has been set by a limit test completing or failing.
- MTEST
- A true indicates that an enabled bit in the mask test event status register has been set by a mask test completing or failing.
- PTIME
- A true indicates that an enabled bit in the precision timebase event status register has been set. This occurs when there is a loss of the precision timebase reference.
- RDCA
- A true indicates that an enabled bit in the RDCA (Remote DCA) event status register has been set.